Windows 10: Announcing Windows 10 Insider Preview Fast+Skip Build 17063 for PC Insider

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  1. rseiler's Avatar
    Posts : 141
    Windows 10 Enterprise x64 (Insider)
       05 Jan 2018 #590

    BlackScout said: View Post
    @Jack07
    I guess Insiders aren't fully protected. (And Dona just said the next build is delayed lol)
    Right, CVE-2017-5719 is not covered. This might have been the #1 reason they didn't bother with the December build yesterday.

    On a related note, is anyone seeing the "PCID optimization is enabled" line coming back as FALSE with a CPU that you know supports PCID? That's what's currently baffling me. Tools like Coreinfo.exe show that PCID is available, but the PowerShell script is saying otherwise. I think some setting in Windows must be running interference.
      My ComputerSystem Spec

  2. johngalt's Avatar
    Posts : 1,534
    WinX Pro x64 IP current
       05 Jan 2018 #591

    I double checked my hardware with SysInternals' CoreINfo - Coreinfo - Windows Sysinternals | Microsoft Docs

    CoreInfo dump:

    Code:
    Intel(R) Core(TM) i7 CPU         965  @ 3.20GHz
    Intel64 Family 6 Model 26 Stepping 4, GenuineIntel
    Microcode signature: 00000012
    HTT       	*	Hyperthreading enabled
    HYPERVISOR	-	Hypervisor is present
    VMX       	*	Supports Intel hardware-assisted virtualization
    SVM       	-	Supports AMD hardware-assisted virtualization
    X64       	*	Supports 64-bit mode
    
    SMX       	-	Supports Intel trusted execution
    SKINIT    	-	Supports AMD SKINIT
    
    NX        	*	Supports no-execute page protection
    SMEP      	-	Supports Supervisor Mode Execution Prevention
    SMAP      	-	Supports Supervisor Mode Access Prevention
    PAGE1GB   	-	Supports 1 GB large pages
    PAE       	*	Supports > 32-bit physical addresses
    PAT       	*	Supports Page Attribute Table
    PSE       	*	Supports 4 MB pages
    PSE36     	*	Supports > 32-bit address 4 MB pages
    PGE       	*	Supports global bit in page tables
    SS        	*	Supports bus snooping for cache operations
    VME       	*	Supports Virtual-8086 mode
    RDWRFSGSBASE	-	Supports direct GS/FS base access
    
    FPU       	*	Implements i387 floating point instructions
    MMX       	*	Supports MMX instruction set
    MMXEXT    	-	Implements AMD MMX extensions
    3DNOW     	-	Supports 3DNow! instructions
    3DNOWEXT  	-	Supports 3DNow! extension instructions
    SSE       	*	Supports Streaming SIMD Extensions
    SSE2      	*	Supports Streaming SIMD Extensions 2
    SSE3      	*	Supports Streaming SIMD Extensions 3
    SSSE3     	*	Supports Supplemental SIMD Extensions 3
    SSE4a     	-	Supports Streaming SIMDR Extensions 4a
    SSE4.1    	*	Supports Streaming SIMD Extensions 4.1
    SSE4.2    	*	Supports Streaming SIMD Extensions 4.2
    
    AES       	-	Supports AES extensions
    AVX       	-	Supports AVX intruction extensions
    FMA       	-	Supports FMA extensions using YMM state
    MSR       	*	Implements RDMSR/WRMSR instructions
    MTRR      	*	Supports Memory Type Range Registers
    XSAVE     	-	Supports XSAVE/XRSTOR instructions
    OSXSAVE   	-	Supports XSETBV/XGETBV instructions
    RDRAND    	-	Supports RDRAND instruction
    RDSEED    	-	Supports RDSEED instruction
    
    CMOV      	*	Supports CMOVcc instruction
    CLFSH     	*	Supports CLFLUSH instruction
    CX8       	*	Supports compare and exchange 8-byte instructions
    CX16      	*	Supports CMPXCHG16B instruction
    BMI1      	-	Supports bit manipulation extensions 1
    BMI2      	-	Supports bit manipulation extensions 2
    ADX       	-	Supports ADCX/ADOX instructions
    DCA       	-	Supports prefetch from memory-mapped device
    F16C      	-	Supports half-precision instruction
    FXSR      	*	Supports FXSAVE/FXSTOR instructions
    FFXSR     	-	Supports optimized FXSAVE/FSRSTOR instruction
    MONITOR   	*	Supports MONITOR and MWAIT instructions
    MOVBE     	-	Supports MOVBE instruction
    ERMSB     	-	Supports Enhanced REP MOVSB/STOSB
    PCLMULDQ  	-	Supports PCLMULDQ instruction
    POPCNT    	*	Supports POPCNT instruction
    LZCNT     	-	Supports LZCNT instruction
    SEP       	*	Supports fast system call instructions
    LAHF-SAHF 	*	Supports LAHF/SAHF instructions in 64-bit mode
    HLE       	-	Supports Hardware Lock Elision instructions
    RTM       	-	Supports Restricted Transactional Memory instructions
    
    DE        	*	Supports I/O breakpoints including CR4.DE
    DTES64    	*	Can write history of 64-bit branch addresses
    DS        	*	Implements memory-resident debug buffer
    DS-CPL    	*	Supports Debug Store feature with CPL
    PCID      	-	Supports PCIDs and settable CR4.PCIDE
    INVPCID   	-	Supports INVPCID instruction
    PDCM      	*	Supports Performance Capabilities MSR
    RDTSCP    	*	Supports RDTSCP instruction
    TSC       	*	Supports RDTSC instruction
    TSC-DEADLINE	-	Local APIC supports one-shot deadline timer
    TSC-INVARIANT	*	TSC runs at constant rate
    xTPR      	*	Supports disabling task priority messages
    
    EIST      	*	Supports Enhanced Intel Speedstep
    ACPI      	*	Implements MSR for power management
    TM        	*	Implements thermal monitor circuitry
    TM2       	*	Implements Thermal Monitor 2 control
    APIC      	*	Implements software-accessible local APIC
    x2APIC    	-	Supports x2APIC
    
    CNXT-ID   	-	L1 data cache mode adaptive or BIOS
    
    MCE       	*	Supports Machine Check, INT18 and CR4.MCE
    MCA       	*	Implements Machine Check Architecture
    PBE       	*	Supports use of FERR#/PBE# pin
    
    PSN       	-	Implements 96-bit processor serial number
    
    PREFETCHW 	*	Supports PREFETCHW instruction
    
    Maximum implemented CPUID leaves: 0000000B (Basic), 80000008 (Extended).
    
    Logical to Physical Processor Map:
    **------  Physical Processor 0 (Hyperthreaded)
    --**----  Physical Processor 1 (Hyperthreaded)
    ----**--  Physical Processor 2 (Hyperthreaded)
    ------**  Physical Processor 3 (Hyperthreaded)
    
    Logical Processor to Socket Map:
    ********  Socket 0
    
    Logical Processor to NUMA Node Map:
    ********  NUMA Node 0
    
    No NUMA nodes.
    
    Logical Processor to Cache Map:
    **------  Data Cache          0, Level 1,   32 KB, Assoc   8, LineSize  64
    **------  Instruction Cache   0, Level 1,   32 KB, Assoc   4, LineSize  64
    **------  Unified Cache       0, Level 2,  256 KB, Assoc   8, LineSize  64
    ********  Unified Cache       1, Level 3,    8 MB, Assoc  16, LineSize  64
    --**----  Data Cache          1, Level 1,   32 KB, Assoc   8, LineSize  64
    --**----  Instruction Cache   1, Level 1,   32 KB, Assoc   4, LineSize  64
    --**----  Unified Cache       2, Level 2,  256 KB, Assoc   8, LineSize  64
    ----**--  Data Cache          2, Level 1,   32 KB, Assoc   8, LineSize  64
    ----**--  Instruction Cache   2, Level 1,   32 KB, Assoc   4, LineSize  64
    ----**--  Unified Cache       3, Level 2,  256 KB, Assoc   8, LineSize  64
    ------**  Data Cache          3, Level 1,   32 KB, Assoc   8, LineSize  64
    ------**  Instruction Cache   3, Level 1,   32 KB, Assoc   4, LineSize  64
    ------**  Unified Cache       4, Level 2,  256 KB, Assoc   8, LineSize  64
    
    Logical Processor to Group Map:
    ********  Group 0
    Whereas this is what the PS module got me:

    Click image for larger version. 

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      My ComputersSystem Spec

  3.    05 Jan 2018 #592

    johngalt said: View Post
    It was being tested in IP builds as early as November - which would explain a *LOT* as to why that one build would not install on AMD devices, now wouldn't it?

    Kinda funny when you think about it now....all that hype about one single build not installing on AMD machines, and it turns out not one single naysayer was even close to why it happened...
    One reason I got out of The IP Group.
      My ComputerSystem Spec


  4. Posts : 37,567
    Dual boot Windows 10 FCU Pro x 64 & current Insider 10 Pro
       05 Jan 2018 #593

    Kari said: View Post
    Totally off topic but that reminds me of my native Finland and the law about using winter tyres / tires (pick your spelling!). The law says you must use winter tyres between December 1st and February 28th, but you may use them already from November 1st and may continue using until March 31st.

    Every year it's this one month between when you may start using winter tyres and when you must start using them when we see an increase in accidents. Everybody knows winter is coming, everybody knows that a single night might bring a few inches snow and icy roads, yet every year it looks as if winter and snow come as surprise, people thinking "It's only November, cops don't fine me if I continue driving with summer tyres! No reson to change yet".
    No such laws here, but they can ticket bald tires (no tread left).

    This reminds me about steel-studded snow tires they introduced here in the early 70's. After a year or so they banned them because they wore down the roads too much. I guess the conclusion is that our roads are more important than our lives.

    My IPs continuing to run fine here. Really would like to see Sets, but I guess we'll have to wait. <3
      My ComputersSystem Spec

  5. johngalt's Avatar
    Posts : 1,534
    WinX Pro x64 IP current
       05 Jan 2018 #594

    HippsieGypsie said: View Post
    No such laws here, but they can ticket bald tires (no tread left).

    This reminds me about steel-studded snow tires they introduced here in the early 70's. After a year or so they banned them because they wore down the roads too much. I guess the conclusion is that our roads are more important than our lives.

    My IPs continuing to run fine here. Really would like to see Sets, but I guess we'll have to wait. <3
    Agreed.

    Also, I cannot seem to find it anymore (too many tabs open I suppose lol), but thanks for the kind words on the PDF quotation post I made :)
      My ComputersSystem Spec

  6.    05 Jan 2018 #595

    What am I doing wrong or is it only for Intel systems?
    Click image for larger version. 

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ID:	171046
      My ComputersSystem Spec

  7.    05 Jan 2018 #596

    Hi,

    From PS you need to run: "Import-Module SpeculationControl" first. Without the quotes.

    Cheers,
      My ComputersSystem Spec

  8.    05 Jan 2018 #597

    fdegrove said: View Post
    Hi,

    From PS you need to run: "Import-Module SpeculationControl" first. Without the quotes.

    Cheers,
    I did and it finished.
      My ComputersSystem Spec

  9.    05 Jan 2018 #598

    Did you run the install as RemoteSigned?
      My ComputerSystem Spec

  10.    05 Jan 2018 #599

    Hi,

    Going by your screenshot you ran "Install..." not "Import"

    Cheers,
      My ComputersSystem Spec


 
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