Windows 10: Asus Z370 Maximus X Motherboards

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  1. essenbe's Avatar
    Posts : 11,151
    Windows 10 Pro and Windows 10 Pro Insider
       26 Feb 2018 #1

    Asus Z370 Maximus X Motherboards


    As requested, a new thread for the Z370 Maximus X Motherboards. Try to keep this one on topic :)
      My ComputersSystem Spec

  2. Cliff S's Avatar
    Posts : 21,250
    Win10 Pro, Win10 Pro N, Win10 Home, Win10 Pro Insider Fast Ring, Windows 8.1 Pro, Ubuntu
       27 Feb 2018 #2

    OK I'll post the update here

    We have a new Realtek update(Sonic Radar & Sonic Suite included, so make a backup of your EQ settings first):
    Click image for larger version. 

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Views:	3 
Size:	50.8 KB 
ID:	178750
    Version 6.0.1.8339
    2018/02/24
    646.83 MBytes

    Realtek Audio Driver V6.0.1.8339
    Updated Amplify Level behavior to prevent overwriting manual adjustments upon reboot or resume from sleep/hibernation.
      My ComputersSystem Spec

  3. Cliff S's Avatar
    Posts : 21,250
    Win10 Pro, Win10 Pro N, Win10 Home, Win10 Pro Insider Fast Ring, Windows 8.1 Pro, Ubuntu
       28 Feb 2018 #3

    New Aura update today:

    Version 1.05.38
    2018/02/2736.8 MBytes
    ASUS AURA
    Read the FAQ

    Changelog:
    Can install and run on laptops and any PC platform
    Can run with only Aura Sync peripherals
    Update Aura desktop logo
    Increase the support number of Addressable LED to 120 for each Addressable header
    Improve system stability
    Improve and adjust effect settings
    Add multi-language support
    for Windows 7 32-bit & 64-bit, Windows 8.1 64-bit, Windows 10 64-bit (support depends on CPU)
      My ComputersSystem Spec

  4.    07 Mar 2018 #4

    How fast are your guy's boards starting up? Either into the Bios or Windows? My last Bios time was 25.7 seconds. Seems a bit slow and I find booting into the Bios a little on the slow side.. (X Hero)
      My ComputerSystem Spec

  5. Cliff S's Avatar
    Posts : 21,250
    Win10 Pro, Win10 Pro N, Win10 Home, Win10 Pro Insider Fast Ring, Windows 8.1 Pro, Ubuntu
       08 Mar 2018 #5

    Kol12 I made a copy of ma 5GHz BIOS setting once, because after updating BIOS, it gets to be a pain resetting everything over again.
    Here is a text copy:
    5GHz_setting.txt
    Code:
    [2018/02/24 10:04:23]
    Ai Overclock Tuner [XMP]
    XMP [XMP DDR4-3000 15-17-17-35-1.35V]
    BCLK Frequency [100.0000]
    ASUS MultiCore Enhancement [Disabled]
    SVID Behavior [Auto]
    AVX Instruction Core Ratio Negative Offset [3]
    CPU Core Ratio [Sync All Cores]
    1-Core Ratio Limit [50]
    2-Core Ratio Limit [50]
    3-Core Ratio Limit [50]
    4-Core Ratio Limit [50]
    5-Core Ratio Limit [50]
    6-Core Ratio Limit [50]
    BCLK Frequency : DRAM Frequency Ratio [Auto]
    DRAM Odd Ratio Mode [Enabled]
    DRAM Frequency [DDR4-3000MHz]
    Xtreme Tweaking [Enabled]
    TPU [Keep Current Settings]
    CPU SVID Support [Disabled]
    CPU Core/Cache Current Limit Max. [255.50]
    Ring Down Bin [Auto]
    Min. CPU Cache Ratio [42]
    Max CPU Cache Ratio [47]
    BCLK Aware Adaptive Voltage [Disabled]
    CPU Core/Cache Voltage [Manual Mode]
    - CPU Core Voltage Override [1.400]
    DRAM Voltage [1.3500]
    CPU VCCIO Voltage [Auto]
    CPU System Agent Voltage [Auto]
    PLL Termination Voltage [Auto]
    PCH Core Voltage [Auto]
    CPU Standby Voltage [Auto]
    DRAM CTRL REF Voltage on CHA [Auto]
    DRAM CTRL REF Voltage on CHB [Auto]
    DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL0 [Auto]
    DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL1 [Auto]
    DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL2 [Auto]
    DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL3 [Auto]
    DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL4 [Auto]
    DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL5 [Auto]
    DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL6 [Auto]
    DRAM DATA REF Voltage on CHA DIMM0 Rank0 BL7 [Auto]
    DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL0 [Auto]
    DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL1 [Auto]
    DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL2 [Auto]
    DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL3 [Auto]
    DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL4 [Auto]
    DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL5 [Auto]
    DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL6 [Auto]
    DRAM DATA REF Voltage on CHA DIMM0 Rank1 BL7 [Auto]
    DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL0 [Auto]
    DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL1 [Auto]
    DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL2 [Auto]
    DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL3 [Auto]
    DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL4 [Auto]
    DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL5 [Auto]
    DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL6 [Auto]
    DRAM DATA REF Voltage on CHA DIMM1 Rank0 BL7 [Auto]
    DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL0 [Auto]
    DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL1 [Auto]
    DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL2 [Auto]
    DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL3 [Auto]
    DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL4 [Auto]
    DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL5 [Auto]
    DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL6 [Auto]
    DRAM DATA REF Voltage on CHA DIMM1 Rank1 BL7 [Auto]
    DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL0 [Auto]
    DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL1 [Auto]
    DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL2 [Auto]
    DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL3 [Auto]
    DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL4 [Auto]
    DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL5 [Auto]
    DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL6 [Auto]
    DRAM DATA REF Voltage on CHB DIMM0 Rank0 BL7 [Auto]
    DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL0 [Auto]
    DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL1 [Auto]
    DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL2 [Auto]
    DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL3 [Auto]
    DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL4 [Auto]
    DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL5 [Auto]
    DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL6 [Auto]
    DRAM DATA REF Voltage on CHB DIMM0 Rank1 BL7 [Auto]
    DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL0 [Auto]
    DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL1 [Auto]
    DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL2 [Auto]
    DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL3 [Auto]
    DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL4 [Auto]
    DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL5 [Auto]
    DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL6 [Auto]
    DRAM DATA REF Voltage on CHB DIMM1 Rank0 BL7 [Auto]
    DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL0 [Auto]
    DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL1 [Auto]
    DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL2 [Auto]
    DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL3 [Auto]
    DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL4 [Auto]
    DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL5 [Auto]
    DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL6 [Auto]
    DRAM DATA REF Voltage on CHB DIMM1 Rank1 BL7 [Auto]
    Realtime Memory Timing [Disabled]
    FCLK Frequency for Early Power On [Auto]
    Initial BCLK Frequency [Auto]
    BCLK Amplitude [Auto]
    BCLK Slew Rate [Auto]
    BCLK Spread Spectrum [Auto]
    BCLK Frequency Slew Rate [Auto]
    DRAM VTT Voltage [Auto]
    VPPDDR Voltage [Auto]
    DMI Voltage [Auto]
    Core PLL Voltage [Auto]
    Internal PLL Voltage [Auto]
    GT PLL Voltage [Auto]
    Ring PLL Voltage [Auto]
    System Agent PLL Voltage [Auto]
    Memory Controller PLL Voltage [Auto]
    PLL Bandwidth [Auto]
    Eventual DRAM Voltage [Auto]
    Eventual CPU Standby Voltage [Auto]
    Eventual PLL Termination Voltage [Auto]
    Eventual DMI Voltage [Auto]
    Maximus Tweak [Mode 2]
    DRAM CAS# Latency [15]
    DRAM RAS# to CAS# Delay [17]
    DRAM RAS# ACT Time [35]
    DRAM Command Rate [Auto]
    DRAM RAS# to RAS# Delay L [Auto]
    DRAM RAS# to RAS# Delay S [Auto]
    DRAM REF Cycle Time [Auto]
    DRAM Refresh Interval [Auto]
    DRAM WRITE Recovery Time [Auto]
    DRAM READ to PRE Time [Auto]
    DRAM FOUR ACT WIN Time [Auto]
    DRAM WRITE to READ Delay [Auto]
    DRAM WRITE to READ Delay L [Auto]
    DRAM WRITE to READ Delay S [Auto]
    DRAM CKE Minimum Pulse Width [Auto]
    DRAM Write Latency [Auto]
    tRDRD_sg [Auto]
    tRDRD_dg [Auto]
    tRDWR_sg [Auto]
    tRDWR_dg [Auto]
    tWRWR_sg [Auto]
    tWRWR_dg [Auto]
    tWRRD_sg [Auto]
    tWRRD_dg [Auto]
    tRDRD_dr [Auto]
    tRDRD_dd [Auto]
    tRDWR_dr [Auto]
    tRDWR_dd [Auto]
    tWRWR_dr [Auto]
    tWRWR_dd [Auto]
    tWRRD_dr [Auto]
    tWRRD_dd [Auto]
    TWRPRE [Auto]
    TRDPRE [Auto]
    tREFIX9 [Auto]
    OREF_RI [Auto]
    MRC Fast Boot [Auto]
    DRAM CLK Period [Auto]
    Memory Scrambler [Enabled]
    Channel A DIMM Control [Enable both DIMMs]
    Channel B DIMM Control [Enable both DIMMs]
    MCH Full Check [Auto]
    Training Profile [Auto]
    DLLBwEn [Auto]
    DRAM SPD Write [Disabled]
    XTU Setting [Auto]
    DRAM RTL INIT value [Auto]
    DRAM RTL (CHA DIMM0 Rank0) [Auto]
    DRAM RTL (CHA DIMM0 Rank1) [Auto]
    DRAM RTL (CHA DIMM1 Rank0) [Auto]
    DRAM RTL (CHA DIMM1 Rank1) [Auto]
    DRAM RTL (CHB DIMM0 Rank0) [Auto]
    DRAM RTL (CHB DIMM0 Rank1) [Auto]
    DRAM RTL (CHB DIMM1 Rank0) [Auto]
    DRAM RTL (CHB DIMM1 Rank1) [Auto]
    DRAM IOL (CHA DIMM0 Rank0) [Auto]
    DRAM IOL (CHA DIMM0 Rank1) [Auto]
    DRAM IOL (CHA DIMM1 Rank0) [Auto]
    DRAM IOL (CHA DIMM1 Rank1) [Auto]
    DRAM IOL (CHB DIMM0 Rank0) [Auto]
    DRAM IOL (CHB DIMM0 Rank1) [Auto]
    DRAM IOL (CHB DIMM1 Rank0) [Auto]
    DRAM IOL (CHB DIMM1 Rank1) [Auto]
    CHA IO_Latency_offset [Auto]
    CHB IO_Latency_offset [Auto]
    CHA RFR delay [Auto]
    CHB RFR delay [Auto]
    ODT RTT WR (CHA) [Auto]
    ODT RTT PARK (CHA) [Auto]
    ODT RTT NOM (CHA) [Auto]
    ODT RTT WR (CHB) [Auto]
    ODT RTT PARK (CHB) [Auto]
    ODT RTT NOM (CHB) [Auto]
    ODT_READ_DURATION [Auto]
    ODT_READ_DELAY [Auto]
    ODT_WRITE_DURATION [Auto]
    ODT_WRITE_DELAY [Auto]
    Data Rising Slope [Auto]
    Data Rising Slope Offset [Auto]
    Cmd Rising Slope [Auto]
    Cmd Rising Slope Offset [Auto]
    Ctl Rising Slope [Auto]
    Ctl Rising Slope Offset [Auto]
    Clk Rising Slope [Auto]
    Clk Rising Slope Offset [Auto]
    Data Falling Slope [Auto]
    Data Falling Slope Offset [Auto]
    Cmd Falling Slope [Auto]
    Cmd Falling Slope Offset [Auto]
    Ctl Falling Slope [Auto]
    Ctl Falling Slope Offset [Auto]
    Clk Falling Slope [Auto]
    Clk Falling Slope Offset [Auto]
    CPU Load-line Calibration [Level 6]
    CPU Current Capability [Auto]
    CPU VRM Switching Frequency [Auto]
    VRM Spread Spectrum [Auto]
    CPU Power Duty Control [T.Probe]
    CPU Power Phase Control [Auto]
    CPU VRM Thermal Control [Auto]
    DRAM Current Capability [100%]
    DRAM Switching Frequency [Auto]
    CPU Core/Cache Boot Voltage [Auto]
    DMI Boot Voltage [Auto]
    Core PLL Boot Voltage [Auto]
    CPU System Agent Boot Voltage [Auto]
    CPU VCCIO Boot Voltage [Auto]
    PLL Termination Boot voltage [Auto]
    CPU Standby Boot Voltage [Auto]
    Intel(R) SpeedStep(tm) [Enabled]
    Turbo Mode [Enabled]
    Long Duration Package Power Limit [4095]
    Package Power Time Window [Auto]
    Short Duration Package Power Limit [4095]
    IA AC Load Line [Auto]
    IA DC Load Line [Auto]
    Hyper-Threading [Enabled]
    Thermal Monitor [Enabled]
    Active Processor Cores [All]
    Intel Virtualization Technology [Enabled]
    Hardware Prefetcher [Enabled]
    Adjacent Cache Line Prefetch [Enabled]
    Boot performance mode [Auto]
    SW Guard Extensions (SGX) [Software Controlled]
    Tcc Offset Time Window [Auto]
    Execute Disable Bit [Enabled]
    SMM Code Access Check [Enabled]
    SMM Use Delay Indication [Enabled]
    SMM Use Block Indication [Enabled]
    Intel(R) SpeedStep(tm) [Enabled]
    Turbo Mode [Enabled]
    CPU C-states [Enabled]
    Enhanced C-states [Enabled]
    CPU C3 Report [Enabled]
    CPU C6 Report [Enabled]
    CPU C7 Report [CPU C7s]
    CPU C8 Report [Enabled]
    CPU C9 Report [Enabled]
    CPU C10 Report [Enabled]
    Package C State Limit [Auto]
    CFG Lock [Disabled]
    Intel(R) Speed Shift Technology [Enabled]
    Number of P states [0]
    Acoustic Noise Mitigation [Disabled]
    Disable Fast PKG C State Ramp for IA Domain [FALSE]
    Slow Slew Rate for IA Domain [Fast/2]
    Disable Fast PKG C State Ramp for GT Domain [FALSE]
    Slow Slew Rate for GT Domain [Fast/2]
    Disable Fast PKG C State Ramp for SA Domain [FALSE]
    Slow Slew Rate for SA Domain [Fast/2]
    Configurable TDP Boot Mode [Nominal]
    Configurable TDP Lock [Disabled]
    CTDP BIOS control [Disabled]
    Power Limit 1 [0]
    Power Limit 2 [0]
    Power Limit 1 Time Window [0]
    ConfigTDP Turbo Activation Ratio [0]
    Overclocking Lock [Disabled]
    PCI Express Native Power Management [Disabled]
    PCH DMI ASPM [Disabled]
    ASPM [Disabled]
    DMI Link ASPM Control [Disabled]
    PEG - ASPM [Disabled]
    PTID Support [Enabled]
    PECI Access Method [Direct I/O]
    PCI Express Native Power Management [Disabled]
    BDAT ACPI Table Support [Disabled]
    Wake system from S5 [Disabled]
    ACPI Debug [Disabled]
    Low Power S0 Idle Capability [Disabled]
    Lpit Recidency Counter [SLP S0]
    PCI Delay Optimization [Disabled]
    ZpODD Support [Disabled]
    Type C Support [Enabled]
    PEP CPU [Enabled]
    PEP Graphics [Enabled]
    PEP ISP [Disabled]
    PEP SATA Controller [Enabled]
    PEP RAID VOL0 [Disabled]
    PEP SATA PORT0 [Disabled]
    PEP SATA PORT1 [Disabled]
    PEP SATA PORT2 [Disabled]
    PEP SATA PORT3 [Disabled]
    PEP SATA PORT4 [Disabled]
    PEP SATA PORT5 [Disabled]
    PEP SATA NVM1 [Disabled]
    PEP SATA NVM2 [Disabled]
    PEP SATA NVM3 [Disabled]
    PEP UART [Enabled]
    PEP I2C0 [Enabled]
    PEP I2C1 [Enabled]
    PEP I2C2 [Enabled]
    PEP I2C3 [Enabled]
    PEP I2C4 [Enabled]
    PEP I2C5 [Enabled]
    PEP SPI [Enabled]
    PEP XHCI [Enabled]
    PEP Audio [Enabled]
    PEP EMMC [Enabled]
    PEP SDXC [Enabled]
    VT-d [Enabled]
    Primary Display [PEG]
    iGPU Multi-Monitor [Disabled]
    DMI Max Link Speed [Auto]
    PCIEX16/X8_1 Link Speed [Auto]
    PCIEX8_2 Link Speed [Auto]
    PCIe Spread Spectrum Clocking [Auto]
    IOAPIC 24-119 Entries [Enabled]
    PCIe Speed [Auto]
    SATA Controller(s) [Enabled]
    SATA Mode Selection [AHCI]
    S.M.A.R.T. Status Check [Enabled]
    Aggressive LPM Support [Disabled]
    SATA6G_1(Gray) [Enabled]
    Hot Plug [Disabled]
    SATA6G_2(Gray) [Enabled]
    Hot Plug [Disabled]
    SATA6G_3(Gray) [Enabled]
    Hot Plug [Disabled]
    SATA6G_4(Gray) [Enabled]
    Hot Plug [Disabled]
    SATA6G_5(Gray) [Enabled]
    Hot Plug [Disabled]
    SATA6G_6(Gray) [Enabled]
    Hot Plug [Disabled]
    Spin Up Device [Disabled]
    SATA Device Type [Hard Disk Drive]
    Topology [Unknown]
    SATA Port 0 DevSlp [Disabled]
    DITO Configuration [Disabled]
    DITO Value [625]
    DM Value [15]
    Spin Up Device [Disabled]
    SATA Device Type [Hard Disk Drive]
    Topology [Unknown]
    SATA Port 1 DevSlp [Disabled]
    DITO Configuration [Disabled]
    DITO Value [625]
    DM Value [15]
    Spin Up Device [Disabled]
    SATA Device Type [Hard Disk Drive]
    Topology [Unknown]
    SATA Port 2 DevSlp [Disabled]
    DITO Configuration [Disabled]
    DITO Value [625]
    DM Value [15]
    Spin Up Device [Disabled]
    SATA Device Type [Hard Disk Drive]
    Topology [Unknown]
    SATA Port 3 DevSlp [Disabled]
    DITO Configuration [Disabled]
    DITO Value [625]
    DM Value [15]
    Spin Up Device [Disabled]
    SATA Device Type [Hard Disk Drive]
    Topology [Unknown]
    SATA Port 4 DevSlp [Disabled]
    DITO Configuration [Disabled]
    DITO Value [625]
    DM Value [15]
    Spin Up Device [Disabled]
    SATA Device Type [Hard Disk Drive]
    Topology [Unknown]
    SATA Port 5 DevSlp [Disabled]
    DITO Configuration [Disabled]
    DITO Value [625]
    DM Value [15]
    Port 6 [Enabled]
    Hot Plug [Disabled]
    Spin Up Device [Disabled]
    SATA Device Type [Hard Disk Drive]
    Topology [Unknown]
    SATA Port 6 DevSlp [Disabled]
    DITO Configuration [Disabled]
    DITO Value [625]
    DM Value [15]
    Port 7 [Enabled]
    Hot Plug [Disabled]
    Spin Up Device [Disabled]
    SATA Device Type [Hard Disk Drive]
    Topology [Unknown]
    SATA Port 7 DevSlp [Disabled]
    DITO Configuration [Disabled]
    DITO Value [625]
    DM Value [15]
    PCI Express Root Port 1 [Enabled]
    Topology [Unknown]
    ASPM [Disabled]
    L1 Substates [Disabled]
    Gen3 Eq Phase3 Method [Software Search]
    UPTP [5]
    DPTP [7]
    ACS [Enabled]
    URR [Disabled]
    FER [Disabled]
    NFER [Disabled]
    CER [Disabled]
    CTO [Disabled]
    SEFE [Disabled]
    SENFE [Disabled]
    SECE [Disabled]
    PME SCI [Enabled]
    Hot Plug [Disabled]
    Advanced Error Reporting [Enabled]
    Transmitter Half Swing [Disabled]
    Detect Timeout [0]
    Extra Bus Reserved [0]
    Reserved Memory [10]
    Reserved I/O [4]
    PCH PCIE1 LTR [Enabled]
    Snoop Latency Override [Auto]
    Non Snoop Latency Override [Auto]
    Force LTR Override [Disabled]
    PCIE1 LTR Lock [Disabled]
    PCIE1 CLKREQ Mapping Override [Default]
    PCI Express Root Port 2 [Enabled]
    Topology [Unknown]
    ASPM [Auto]
    L1 Substates [L1.1 & L1.2]
    Gen3 Eq Phase3 Method [Software Search]
    UPTP [5]
    DPTP [7]
    ACS [Enabled]
    URR [Disabled]
    FER [Disabled]
    NFER [Disabled]
    CER [Disabled]
    CTO [Disabled]
    SEFE [Disabled]
    SENFE [Disabled]
    SECE [Disabled]
    PME SCI [Enabled]
    Hot Plug [Disabled]
    Advanced Error Reporting [Enabled]
    PCIe Speed [Auto]
    Transmitter Half Swing [Disabled]
    Detect Timeout [0]
    Extra Bus Reserved [0]
    Reserved Memory [10]
    Reserved I/O [4]
    PCH PCIE2 LTR [Enabled]
    Snoop Latency Override [Auto]
    Non Snoop Latency Override [Auto]
    Force LTR Override [Disabled]
    PCIE2 LTR Lock [Disabled]
    PCIE2 CLKREQ Mapping Override [Default]
    PCI Express Root Port 3 [Enabled]
    Topology [Unknown]
    ASPM [Auto]
    L1 Substates [L1.1 & L1.2]
    Gen3 Eq Phase3 Method [Software Search]
    UPTP [5]
    DPTP [7]
    ACS [Enabled]
    URR [Disabled]
    FER [Disabled]
    NFER [Disabled]
    CER [Disabled]
    CTO [Disabled]
    SEFE [Disabled]
    SENFE [Disabled]
    SECE [Disabled]
    PME SCI [Enabled]
    Hot Plug [Disabled]
    Advanced Error Reporting [Enabled]
    PCIe Speed [Auto]
    Transmitter Half Swing [Disabled]
    Detect Timeout [0]
    Extra Bus Reserved [0]
    Reserved Memory [10]
    Reserved I/O [4]
    PCH PCIE3 LTR [Enabled]
    Snoop Latency Override [Auto]
    Non Snoop Latency Override [Auto]
    Force LTR Override [Disabled]
    PCIE3 LTR Lock [Disabled]
    PCIE3 CLKREQ Mapping Override [Default]
    PCI Express Root Port 4 [Enabled]
    Topology [Unknown]
    ASPM [Auto]
    L1 Substates [L1.1 & L1.2]
    Gen3 Eq Phase3 Method [Software Search]
    UPTP [5]
    DPTP [7]
    ACS [Enabled]
    URR [Disabled]
    FER [Disabled]
    NFER [Disabled]
    CER [Disabled]
    CTO [Disabled]
    SEFE [Disabled]
    SENFE [Disabled]
    SECE [Disabled]
    PME SCI [Enabled]
    Hot Plug [Disabled]
    Advanced Error Reporting [Enabled]
    PCIe Speed [Auto]
    Transmitter Half Swing [Disabled]
    Detect Timeout [0]
    Extra Bus Reserved [0]
    Reserved Memory [10]
    Reserved I/O [4]
    PCH PCIE4 LTR [Enabled]
    Snoop Latency Override [Auto]
    Non Snoop Latency Override [Auto]
    Force LTR Override [Disabled]
    PCIE4 LTR Lock [Disabled]
    PCIE4 CLKREQ Mapping Override [Default]
    PCI Express Root Port 5 [Enabled]
    Topology [Unknown]
    ASPM [Auto]
    L1 Substates [L1.1 & L1.2]
    Gen3 Eq Phase3 Method [Software Search]
    UPTP [5]
    DPTP [7]
    ACS [Enabled]
    URR [Disabled]
    FER [Disabled]
    NFER [Disabled]
    CER [Disabled]
    CTO [Disabled]
    SEFE [Disabled]
    SENFE [Disabled]
    SECE [Disabled]
    PME SCI [Enabled]
    Hot Plug [Disabled]
    Advanced Error Reporting [Enabled]
    PCIe Speed [Auto]
    Transmitter Half Swing [Disabled]
    Detect Timeout [0]
    Extra Bus Reserved [0]
    Reserved Memory [10]
    Reserved I/O [4]
    PCH PCIE5 LTR [Enabled]
    Snoop Latency Override [Auto]
    Non Snoop Latency Override [Auto]
    Force LTR Override [Disabled]
    PCIE5 LTR Lock [Disabled]
    PCIE5 CLKREQ Mapping Override [Default]
    PCI Express Root Port 6 [Enabled]
    Topology [Unknown]
    ASPM [Auto]
    L1 Substates [L1.1 & L1.2]
    Gen3 Eq Phase3 Method [Software Search]
    UPTP [5]
    DPTP [7]
    ACS [Enabled]
    URR [Disabled]
    FER [Disabled]
    NFER [Disabled]
    CER [Disabled]
    CTO [Disabled]
    SEFE [Disabled]
    SENFE [Disabled]
    SECE [Disabled]
    PME SCI [Enabled]
    Hot Plug [Disabled]
    Advanced Error Reporting [Enabled]
    PCIe Speed [Auto]
    Transmitter Half Swing [Disabled]
    Detect Timeout [0]
    Extra Bus Reserved [0]
    Reserved Memory [10]
    Reserved I/O [4]
    PCH PCIE6 LTR [Enabled]
    Snoop Latency Override [Auto]
    Non Snoop Latency Override [Auto]
    Force LTR Override [Disabled]
    PCIE6 LTR Lock [Disabled]
    PCIE6 CLKREQ Mapping Override [Default]
    PCI Express Root Port 7 [Enabled]
    Topology [Unknown]
    ASPM [Auto]
    L1 Substates [L1.1 & L1.2]
    Gen3 Eq Phase3 Method [Software Search]
    UPTP [5]
    DPTP [7]
    ACS [Enabled]
    URR [Disabled]
    FER [Disabled]
    NFER [Disabled]
    CER [Disabled]
    CTO [Disabled]
    SEFE [Disabled]
    SENFE [Disabled]
    SECE [Disabled]
    PME SCI [Enabled]
    Hot Plug [Disabled]
    Advanced Error Reporting [Enabled]
    PCIe Speed [Auto]
    Transmitter Half Swing [Disabled]
    Detect Timeout [0]
    Extra Bus Reserved [7]
    Reserved Memory [17]
    Reserved I/O [16]
    PCH PCIE7 LTR [Enabled]
    Snoop Latency Override [Auto]
    Non Snoop Latency Override [Auto]
    Force LTR Override [Disabled]
    PCIE7 LTR Lock [Disabled]
    PCIE7 CLKREQ Mapping Override [Default]
    PCI Express Root Port 8 [Enabled]
    Topology [Unknown]
    ASPM [Auto]
    L1 Substates [L1.1 & L1.2]
    Gen3 Eq Phase3 Method [Software Search]
    UPTP [5]
    DPTP [7]
    ACS [Enabled]
    URR [Disabled]
    FER [Disabled]
    NFER [Disabled]
    CER [Disabled]
    CTO [Disabled]
    SEFE [Disabled]
    SENFE [Disabled]
    SECE [Disabled]
    PME SCI [Enabled]
    Hot Plug [Disabled]
    Advanced Error Reporting [Enabled]
    PCIe Speed [Auto]
    Transmitter Half Swing [Disabled]
    Detect Timeout [0]
    Extra Bus Reserved [7]
    Reserved Memory [17]
    Reserved I/O [8]
    PCH PCIE8 LTR [Enabled]
    Snoop Latency Override [Auto]
    Non Snoop Latency Override [Auto]
    Force LTR Override [Disabled]
    PCIE8 LTR Lock [Disabled]
    PCIE8 CLKREQ Mapping Override [Default]
    PCI Express Root Port 9 [Enabled]
    Topology [Unknown]
    ASPM [Auto]
    L1 Substates [L1.1 & L1.2]
    Gen3 Eq Phase3 Method [Software Search]
    UPTP [5]
    DPTP [7]
    ACS [Enabled]
    URR [Disabled]
    FER [Disabled]
    NFER [Disabled]
    CER [Disabled]
    CTO [Disabled]
    SEFE [Disabled]
    SENFE [Disabled]
    SECE [Disabled]
    PME SCI [Enabled]
    Hot Plug [Disabled]
    Advanced Error Reporting [Enabled]
    PCIe Speed [Auto]
    Transmitter Half Swing [Disabled]
    Detect Timeout [0]
    Extra Bus Reserved [0]
    Reserved Memory [10]
    Reserved I/O [4]
    PCH PCIE9 LTR [Enabled]
    Snoop Latency Override [Auto]
    Non Snoop Latency Override [Auto]
    Force LTR Override [Disabled]
    PCIE9 LTR Lock [Disabled]
    PCIE9 CLKREQ Mapping Override [Default]
    PCI Express Root Port 10 [Enabled]
    Topology [Unknown]
    ASPM [Auto]
    L1 Substates [L1.1 & L1.2]
    Gen3 Eq Phase3 Method [Software Search]
    UPTP [5]
    DPTP [7]
    ACS [Enabled]
    URR [Disabled]
    FER [Disabled]
    NFER [Disabled]
    CER [Disabled]
    CTO [Disabled]
    SEFE [Disabled]
    SENFE [Disabled]
    SECE [Disabled]
    PME SCI [Enabled]
    Hot Plug [Disabled]
    Advanced Error Reporting [Enabled]
    PCIe Speed [Auto]
    Transmitter Half Swing [Disabled]
    Detect Timeout [0]
    Extra Bus Reserved [0]
    Reserved Memory [10]
    Reserved I/O [4]
    PCH PCIE10 LTR [Enabled]
    Snoop Latency Override [Auto]
    Non Snoop Latency Override [Auto]
    Force LTR Override [Disabled]
    PCIE10 LTR Lock [Disabled]
    PCIE10 CLKREQ Mapping Override [Default]
    PCI Express Root Port 11 [Enabled]
    Topology [Unknown]
    ASPM [Auto]
    L1 Substates [L1.1 & L1.2]
    Gen3 Eq Phase3 Method [Software Search]
    UPTP [5]
    DPTP [7]
    ACS [Enabled]
    URR [Disabled]
    FER [Disabled]
    NFER [Disabled]
    CER [Disabled]
    CTO [Disabled]
    SEFE [Disabled]
    SENFE [Disabled]
    SECE [Disabled]
    PME SCI [Enabled]
    Hot Plug [Disabled]
    Advanced Error Reporting [Enabled]
    PCIe Speed [Auto]
    Transmitter Half Swing [Disabled]
    Detect Timeout [0]
    Extra Bus Reserved [0]
    Reserved Memory [10]
    Reserved I/O [4]
    PCH PCIE11 LTR [Enabled]
    Snoop Latency Override [Auto]
    Non Snoop Latency Override [Auto]
    Force LTR Override [Disabled]
    PCIE11 LTR Lock [Disabled]
    PCIE11 CLKREQ Mapping Override [Default]
    PCI Express Root Port 12 [Enabled]
    Topology [Unknown]
    ASPM [Auto]
    L1 Substates [L1.1 & L1.2]
    Gen3 Eq Phase3 Method [Software Search]
    UPTP [5]
    DPTP [7]
    ACS [Enabled]
    URR [Disabled]
    FER [Disabled]
    NFER [Disabled]
    CER [Disabled]
    CTO [Disabled]
    SEFE [Disabled]
    SENFE [Disabled]
    SECE [Disabled]
    PME SCI [Enabled]
    Hot Plug [Disabled]
    Advanced Error Reporting [Enabled]
    PCIe Speed [Auto]
    Transmitter Half Swing [Disabled]
    Detect Timeout [0]
    Extra Bus Reserved [0]
    Reserved Memory [10]
    Reserved I/O [4]
    PCH PCIE12 LTR [Enabled]
    Snoop Latency Override [Auto]
    Non Snoop Latency Override [Auto]
    Force LTR Override [Disabled]
    PCIE12 LTR Lock [Disabled]
    PCIE12 CLKREQ Mapping Override [Default]
    PCI Express Root Port 13 [Enabled]
    Topology [Unknown]
    ASPM [Auto]
    L1 Substates [L1.1 & L1.2]
    Gen3 Eq Phase3 Method [Software Search]
    UPTP [5]
    DPTP [7]
    ACS [Enabled]
    URR [Disabled]
    FER [Disabled]
    NFER [Disabled]
    CER [Disabled]
    CTO [Disabled]
    SEFE [Disabled]
    SENFE [Disabled]
    SECE [Disabled]
    PME SCI [Enabled]
    Hot Plug [Disabled]
    Advanced Error Reporting [Enabled]
    PCIe Speed [Auto]
    Transmitter Half Swing [Disabled]
    Detect Timeout [0]
    Extra Bus Reserved [0]
    Reserved Memory [10]
    Reserved I/O [4]
    PCH PCIE13 LTR [Enabled]
    Snoop Latency Override [Auto]
    Non Snoop Latency Override [Auto]
    Force LTR Override [Disabled]
    PCIE13 LTR Lock [Disabled]
    PCIE13 CLKREQ Mapping Override [Default]
    PCI Express Root Port 14 [Enabled]
    Topology [Unknown]
    ASPM [Auto]
    L1 Substates [L1.1 & L1.2]
    Gen3 Eq Phase3 Method [Software Search]
    UPTP [5]
    DPTP [7]
    ACS [Enabled]
    URR [Disabled]
    FER [Disabled]
    NFER [Disabled]
    CER [Disabled]
    CTO [Disabled]
    SEFE [Disabled]
    SENFE [Disabled]
    SECE [Disabled]
    PME SCI [Enabled]
    Hot Plug [Disabled]
    Advanced Error Reporting [Enabled]
    PCIe Speed [Auto]
    Transmitter Half Swing [Disabled]
    Detect Timeout [0]
    Extra Bus Reserved [0]
    Reserved Memory [10]
    Reserved I/O [4]
    PCH PCIE14 LTR [Enabled]
    Snoop Latency Override [Auto]
    Non Snoop Latency Override [Auto]
    Force LTR Override [Disabled]
    PCIE14 LTR Lock [Disabled]
    PCIE14 CLKREQ Mapping Override [Default]
    PCI Express Root Port 15 [Enabled]
    Topology [Unknown]
    ASPM [Auto]
    L1 Substates [L1.1 & L1.2]
    Gen3 Eq Phase3 Method [Software Search]
    UPTP [5]
    DPTP [7]
    ACS [Enabled]
    URR [Disabled]
    FER [Disabled]
    NFER [Disabled]
    CER [Disabled]
    CTO [Disabled]
    SEFE [Disabled]
    SENFE [Disabled]
    SECE [Disabled]
    PME SCI [Enabled]
    Hot Plug [Disabled]
    Advanced Error Reporting [Enabled]
    PCIe Speed [Auto]
    Transmitter Half Swing [Disabled]
    Detect Timeout [0]
    Extra Bus Reserved [0]
    Reserved Memory [10]
    Reserved I/O [4]
    PCH PCIE15 LTR [Enabled]
    Snoop Latency Override [Auto]
    Non Snoop Latency Override [Auto]
    Force LTR Override [Disabled]
    PCIE15 LTR Lock [Disabled]
    PCIE15 CLKREQ Mapping Override [Default]
    PCI Express Root Port 16 [Enabled]
    Topology [Unknown]
    ASPM [Auto]
    L1 Substates [L1.1 & L1.2]
    Gen3 Eq Phase3 Method [Software Search]
    UPTP [5]
    DPTP [7]
    ACS [Enabled]
    URR [Disabled]
    FER [Disabled]
    NFER [Disabled]
    CER [Disabled]
    CTO [Disabled]
    SEFE [Disabled]
    SENFE [Disabled]
    SECE [Disabled]
    PME SCI [Enabled]
    Hot Plug [Disabled]
    Advanced Error Reporting [Enabled]
    PCIe Speed [Auto]
    Transmitter Half Swing [Disabled]
    Detect Timeout [0]
    Extra Bus Reserved [0]
    Reserved Memory [10]
    Reserved I/O [4]
    PCH PCIE16 LTR [Enabled]
    Snoop Latency Override [Auto]
    Non Snoop Latency Override [Auto]
    Force LTR Override [Disabled]
    PCIE16 LTR Lock [Disabled]
    PCIE16 CLKREQ Mapping Override [Default]
    PCI Express Root Port 17 [Enabled]
    Topology [Unknown]
    ASPM [Auto]
    L1 Substates [L1.1 & L1.2]
    Gen3 Eq Phase3 Method [Software Search]
    UPTP [5]
    DPTP [7]
    ACS [Enabled]
    URR [Disabled]
    FER [Disabled]
    NFER [Disabled]
    CER [Disabled]
    CTO [Disabled]
    SEFE [Disabled]
    SENFE [Disabled]
    SECE [Disabled]
    PME SCI [Enabled]
    Hot Plug [Disabled]
    Advanced Error Reporting [Enabled]
    PCIe Speed [Auto]
    Transmitter Half Swing [Disabled]
    Detect Timeout [0]
    Extra Bus Reserved [0]
    Reserved Memory [10]
    Reserved I/O [4]
    PCH PCIE17 LTR [Enabled]
    Snoop Latency Override [Auto]
    Non Snoop Latency Override [Auto]
    Force LTR Override [Disabled]
    PCIE17 LTR Lock [Disabled]
    PCIE17 CLKREQ Mapping Override [Default]
    PCI Express Root Port 18 [Enabled]
    Topology [Unknown]
    ASPM [Auto]
    L1 Substates [L1.1 & L1.2]
    Gen3 Eq Phase3 Method [Software Search]
    UPTP [5]
    DPTP [7]
    ACS [Enabled]
    URR [Disabled]
    FER [Disabled]
    NFER [Disabled]
    CER [Disabled]
    CTO [Disabled]
    SEFE [Disabled]
    SENFE [Disabled]
    SECE [Disabled]
    PME SCI [Enabled]
    Hot Plug [Disabled]
    Advanced Error Reporting [Enabled]
    PCIe Speed [Auto]
    Transmitter Half Swing [Disabled]
    Detect Timeout [0]
    Extra Bus Reserved [0]
    Reserved Memory [10]
    Reserved I/O [4]
    PCH PCIE18 LTR [Enabled]
    Snoop Latency Override [Auto]
    Non Snoop Latency Override [Auto]
    Force LTR Override [Disabled]
    PCIE18 LTR Lock [Disabled]
    PCIE18 CLKREQ Mapping Override [Default]
    PCI Express Root Port 19 [Enabled]
    Topology [Unknown]
    ASPM [Auto]
    L1 Substates [L1.1 & L1.2]
    Gen3 Eq Phase3 Method [Software Search]
    UPTP [5]
    DPTP [7]
    ACS [Enabled]
    URR [Disabled]
    FER [Disabled]
    NFER [Disabled]
    CER [Disabled]
    CTO [Disabled]
    SEFE [Disabled]
    SENFE [Disabled]
    SECE [Disabled]
    PME SCI [Enabled]
    Hot Plug [Disabled]
    Advanced Error Reporting [Enabled]
    PCIe Speed [Auto]
    Transmitter Half Swing [Disabled]
    Detect Timeout [0]
    Extra Bus Reserved [0]
    Reserved Memory [10]
    Reserved I/O [4]
    PCH PCIE19 LTR [Enabled]
    Snoop Latency Override [Auto]
    Non Snoop Latency Override [Auto]
    Force LTR Override [Disabled]
    PCIE19 LTR Lock [Disabled]
    PCIE19 CLKREQ Mapping Override [Default]
    PCI Express Root Port 20 [Enabled]
    Topology [Unknown]
    ASPM [Auto]
    L1 Substates [L1.1 & L1.2]
    Gen3 Eq Phase3 Method [Software Search]
    UPTP [5]
    DPTP [7]
    ACS [Enabled]
    URR [Disabled]
    FER [Disabled]
    NFER [Disabled]
    CER [Disabled]
    CTO [Disabled]
    SEFE [Disabled]
    SENFE [Disabled]
    SECE [Disabled]
    PME SCI [Enabled]
    Hot Plug [Disabled]
    Advanced Error Reporting [Enabled]
    PCIe Speed [Auto]
    Transmitter Half Swing [Disabled]
    Detect Timeout [0]
    Extra Bus Reserved [0]
    Reserved Memory [10]
    Reserved I/O [4]
    PCH PCIE20 LTR [Enabled]
    Snoop Latency Override [Auto]
    Non Snoop Latency Override [Auto]
    Force LTR Override [Disabled]
    PCIE20 LTR Lock [Disabled]
    PCIE20 CLKREQ Mapping Override [Default]
    PCI Express Root Port 21 [Enabled]
    Topology [Unknown]
    ASPM [Auto]
    L1 Substates [L1.1 & L1.2]
    Gen3 Eq Phase3 Method [Software Search]
    UPTP [5]
    DPTP [7]
    ACS [Enabled]
    URR [Disabled]
    FER [Disabled]
    NFER [Disabled]
    CER [Disabled]
    CTO [Disabled]
    SEFE [Disabled]
    SENFE [Disabled]
    SECE [Disabled]
    PME SCI [Enabled]
    Hot Plug [Disabled]
    Advanced Error Reporting [Enabled]
    PCIe Speed [Auto]
    Transmitter Half Swing [Disabled]
    Detect Timeout [0]
    Extra Bus Reserved [0]
    Reserved Memory [10]
    Reserved I/O [4]
    PCH PCIE21 LTR [Enabled]
    Snoop Latency Override [Auto]
    Non Snoop Latency Override [Auto]
    Force LTR Override [Disabled]
    PCIE21 LTR Lock [Disabled]
    PCIE20 CLKREQ Mapping Override [Default]
    PCI Express Root Port 22 [Enabled]
    Topology [Unknown]
    ASPM [Auto]
    L1 Substates [L1.1 & L1.2]
    Gen3 Eq Phase3 Method [Software Search]
    UPTP [5]
    DPTP [7]
    ACS [Enabled]
    URR [Disabled]
    FER [Disabled]
    NFER [Disabled]
    CER [Disabled]
    CTO [Disabled]
    SEFE [Disabled]
    SENFE [Disabled]
    SECE [Disabled]
    PME SCI [Enabled]
    Hot Plug [Disabled]
    Advanced Error Reporting [Enabled]
    PCIe Speed [Auto]
    Transmitter Half Swing [Disabled]
    Detect Timeout [0]
    Extra Bus Reserved [0]
    Reserved Memory [10]
    Reserved I/O [4]
    PCH PCIE22 LTR [Enabled]
    Snoop Latency Override [Auto]
    Non Snoop Latency Override [Auto]
    Force LTR Override [Disabled]
    PCIE22 LTR Lock [Disabled]
    PCIE20 CLKREQ Mapping Override [Default]
    PCI Express Root Port 23 [Enabled]
    Topology [Unknown]
    ASPM [Auto]
    L1 Substates [L1.1 & L1.2]
    Gen3 Eq Phase3 Method [Software Search]
    UPTP [5]
    DPTP [7]
    ACS [Enabled]
    URR [Disabled]
    FER [Disabled]
    NFER [Disabled]
    CER [Disabled]
    CTO [Disabled]
    SEFE [Disabled]
    SENFE [Disabled]
    SECE [Disabled]
    PME SCI [Enabled]
    Hot Plug [Disabled]
    Advanced Error Reporting [Enabled]
    PCIe Speed [Auto]
    Transmitter Half Swing [Disabled]
    Detect Timeout [0]
    Extra Bus Reserved [0]
    Reserved Memory [10]
    Reserved I/O [4]
    PCH PCIE23 LTR [Enabled]
    Snoop Latency Override [Auto]
    Non Snoop Latency Override [Auto]
    Force LTR Override [Disabled]
    PCIE23 LTR Lock [Disabled]
    PCIE20 CLKREQ Mapping Override [Default]
    PCI Express Root Port 24 [Enabled]
    Topology [Unknown]
    ASPM [Auto]
    L1 Substates [L1.1 & L1.2]
    Gen3 Eq Phase3 Method [Software Search]
    UPTP [5]
    DPTP [7]
    ACS [Enabled]
    URR [Disabled]
    FER [Disabled]
    NFER [Disabled]
    CER [Disabled]
    CTO [Disabled]
    SEFE [Disabled]
    SENFE [Disabled]
    SECE [Disabled]
    PME SCI [Enabled]
    Hot Plug [Disabled]
    Advanced Error Reporting [Enabled]
    PCIe Speed [Auto]
    Transmitter Half Swing [Disabled]
    Detect Timeout [0]
    Extra Bus Reserved [0]
    Reserved Memory [10]
    Reserved I/O [4]
    PCH PCIE24 LTR [Enabled]
    Snoop Latency Override [Auto]
    Non Snoop Latency Override [Auto]
    Force LTR Override [Disabled]
    PCIE24 LTR Lock [Disabled]
    PCIE20 CLKREQ Mapping Override [Default]
    Audio DSP [Disabled]
    HDA-Link Codec Select [Platform Onboard]
    iDisplay Audio Disconnect [Disabled]
    PME Enable [Disabled]
    SerialIO timing parameters [Disabled]
    TPM Device Selection [PTT]
    PTP aware OS [PTP Aware]
    Me FW Image Re-Flash [Disabled]
    Local FW Update [Enabled]
    HECI Timeouts [Enabled]
    Force ME DID Init Status [Disabled]
    CPU Replaced Polling Disable [Disabled]
    ME DID Message [Enabled]
    HECI Retry Disable [Disabled]
    HECI Message check Disable [Disabled]
    MBP HOB Skip [Disabled]
    HECI2 Interface Communication [Disabled]
    KT Device [Enabled]
    IDER Device [Enabled]
    End Of Post Message [Send in DXE]
    D0I3 Setting for HECI Disable [Disabled]
    Select Camera [Ivcam]
    Delay needed for Ivcam power on [0]
    Delay needed for Ivcam power off [0]
    Rotation [0]
    DFU support [Disabled]
    Wake support [Disabled]
    Core PLL Voltage Offset [0]
    GT PLL Voltage Offset [0]
    Ring PLL Voltage Offset [0]
    System Agent PLL Voltage Offset [0]
    Memory Controller PLL Voltage Offset [0]
    ASF support [Enabled]
    USB Provisioning of AMT [Disabled]
    Activate Remote Assistance Process [Disabled]
    CIRA Timeout [0]
    PET Progress [Enabled]
    WatchDog [Disabled]
    OS Timer [0]
    BIOS Timer [0]
    Secure Erase mode [Simulated]
    Force Secure Erase [Disabled]
    MEBx hotkey Pressed [Disabled]
    MEBx Selection Screen [Disabled]
    Hide Unconfigure ME Confirmation Prompt [Disabled]
    MEBx OEM Debug Menu Enable [Disabled]
    Unconfigure ME [Disabled]
    Non-UI Mode Resolution [Auto]
    UI Mode Resolution [Auto]
    Graphics Mode Resolution [Auto]
    Security Device Support [Enable]
    Security Device Support [Enable]
    TPM State [Enabled]
    Pending operation [None]
    Security Device Support [Enable]
    SHA-1 PCR Bank [Enabled]
    SHA256 PCR Bank [Enabled]
    Pending operation [None]
    Platform Hierarchy [Enabled]
    Storage Hierarchy [Enabled]
    Endorsement Hierarchy [Enabled]
    TPM2.0 UEFI Spec Version [TCG_2]
    Physical Presence Spec Version [1.3]
    Detect Non-Compliance Device [Disabled]
    Prefetchable Memory [10]
    Reserved Memory Alignment [1]
    Prefetchable Memory Alignment [1]
    Detect Non-Compliance Device [Disabled]
    Prefetchable Memory [10]
    Reserved Memory Alignment [1]
    Prefetchable Memory Alignment [1]
    Detect Non-Compliance Device [Disabled]
    Prefetchable Memory [10]
    Reserved Memory Alignment [1]
    Prefetchable Memory Alignment [1]
    Detect Non-Compliance Device [Disabled]
    Prefetchable Memory [10]
    Reserved Memory Alignment [1]
    Prefetchable Memory Alignment [1]
    Detect Non-Compliance Device [Disabled]
    Prefetchable Memory [10]
    Reserved Memory Alignment [1]
    Prefetchable Memory Alignment [1]
    Detect Non-Compliance Device [Disabled]
    Prefetchable Memory [10]
    Reserved Memory Alignment [1]
    Prefetchable Memory Alignment [1]
    Detect Non-Compliance Device [Disabled]
    Prefetchable Memory [10]
    Reserved Memory Alignment [1]
    Prefetchable Memory Alignment [1]
    Detect Non-Compliance Device [Disabled]
    Prefetchable Memory [10]
    Reserved Memory Alignment [1]
    Prefetchable Memory Alignment [1]
    Detect Non-Compliance Device [Disabled]
    Prefetchable Memory [10]
    Reserved Memory Alignment [1]
    Prefetchable Memory Alignment [1]
    Detect Non-Compliance Device [Disabled]
    Prefetchable Memory [10]
    Reserved Memory Alignment [1]
    Prefetchable Memory Alignment [1]
    Detect Non-Compliance Device [Disabled]
    Prefetchable Memory [10]
    Reserved Memory Alignment [1]
    Prefetchable Memory Alignment [1]
    Detect Non-Compliance Device [Disabled]
    Prefetchable Memory [10]
    Reserved Memory Alignment [1]
    Prefetchable Memory Alignment [1]
    Detect Non-Compliance Device [Disabled]
    Prefetchable Memory [10]
    Reserved Memory Alignment [1]
    Prefetchable Memory Alignment [1]
    Onboard LED [Enabled]
    Q-Code LED Function [Auto]
    ErP Ready [Disabled]
    Restore AC Power Loss [Power Off]
    Power On By PCI-E/PCI [Disabled]
    Power On By RTC [Disabled]
    HD Audio Controller [Enabled]
    PCIEX4_3 Bandwidth [X4 Mode]
    M.2_1 Configuration: [Auto][SATA mode][PCIE mode] [PCIE mode]
    M.2_2 PCIe Bandwidth Configuration: [X2][X4] [X4]
    Asmedia Back USB 3.1 Controller [Enabled]
    Asmedia Front USB 3.1 Controller [Enabled]
    USB Type C Power Switch [Auto]
    When system is in working state [On]
    When system is in sleep, hibernate or soft off states [Off]
    Intel LAN Controller [Enabled]
    Intel LAN PXE Option ROM [Disabled]
    Detect Non-Compliance Device [Disabled]
    Primary PEG [Auto]
    Primary PCIE [Auto]
    Network Stack [Disabled]
    Legacy USB Support [Enabled]
    USB Keyboard and Mouse Simulator [Disabled]
    General UDisk 5.00 [Auto]
    U31G2_EC2 [Enabled]
    U31G2_EA1 [Enabled]
    U31G1_1 [Enabled]
    U31G1_2 [Enabled]
    U31G1_3 [Enabled]
    U31G1_4 [Enabled]
    U31G1_5 [Enabled]
    U31G1_6 [Enabled]
    USB_7 [Enabled]
    USB_8 [Enabled]
    USB_9 [Enabled]
    USB_10 [Enabled]
    USB_11 [Enabled]
    USB_12 [Enabled]
    CPU Temperature [Monitor]
    MotherBoard Temperature [Monitor]
    PCH Temperature [Monitor]
    T_Sensor Temperature [Ignore]
    EXT_Sensor1  Temperature [Ignore]
    EXT_Sensor2  Temperature [Ignore]
    EXT_Sensor3  Temperature [Ignore]
    Water In T Sensor [Ignore]
    Water Out T Sensor [Ignore]
    CPU Fan Speed [Ignore]
    Chassis Fan 1 Speed [Monitor]
    Chassis Fan 2 Speed [Monitor]
    Chassis Fan 3 Speed [Monitor]
    AIO PUMP Speed [Monitor]
    HAMP Fan Speed [Monitor]
    CPU Optional Fan Speed [Ignore]
    W_PUMP+ Speed [Ignore]
    Extension Fan 1 Speed [Ignore]
    Extension Fan 2 Speed [Ignore]
    Extension Fan 3 Speed [Ignore]
    Flow Rate [Ignore]
    CPU Core Voltage [Monitor]
    3.3V Voltage [Monitor]
    5V Voltage [Monitor]
    12V Voltage [Monitor]
    CPU Q-Fan Control [DC Mode]
    CPU Fan Step Up [0 sec]
    CPU Fan Step Down [0 sec]
    CPU Fan Speed Lower Limit [200 RPM]
    CPU Fan Profile [Manual]
    CPU Upper Temperature [70]
    CPU Fan Max. Duty Cycle (%) [100]
    CPU Middle Temperature [45]
    CPU Fan Middle. Duty Cycle (%) [60]
    CPU Lower Temperature [40]
    CPU Fan Min. Duty Cycle (%) [60]
    AIO_PUMP/W_PUMP+ Control [DC Mode]
    AIO_PUMP/W_PUMP+ Upper Temperature [70]
    AIO_PUMP/W_PUMP+ Max. Duty Cycle (%) [100]
    AIO_PUMP/W_PUMP+ Middle Temperature [45]
    AIO_PUMP/W_PUMP+ Middle. Duty Cycle(%) [100]
    AIO_PUMP/W_PUMP+ Lower Temperature [20]
    AIO_PUMP/W_PUMP+ Min. Duty Cycle (%) [100]
    Chassis Fan 1 Q-Fan Control [DC Mode]
    Chassis Fan 1 Q-Fan Source [MotherBoard]
    Chassis Fan 1 Step Up [0 sec]
    Chassis Fan 1 Step Down [0 sec]
    Chassis Fan 1 Speed Low Limit [200 RPM]
    Chassis Fan 1 Profile [Silent]
    Chassis Fan 2 Q-Fan Control [DC Mode]
    Chassis Fan 2 Q-Fan Source [MotherBoard]
    Chassis Fan 2 Step Up [25 sec]
    Chassis Fan 2 Step Down [25 sec]
    Chassis Fan 2 Speed Low Limit [500 RPM]
    Chassis Fan 2 Profile [Silent]
    Chassis Fan 3 Q-Fan Control [DC Mode]
    Chassis Fan 3 Q-Fan Source [MotherBoard]
    Chassis Fan 3 Step Up [0 sec]
    Chassis Fan 3 Step Down [0 sec]
    Chassis Fan 3 Speed Low Limit [200 RPM]
    Chassis Fan 3 Profile [Silent]
    HAMP Fan Control [DC Mode]
    HAMP Fan Source [PCH]
    HAMP Fan Step Up [0 sec]
    HAMP Fan Step Down [0 sec]
    HAMP Fan Speed Low Limit [200 RPM]
    HAMP Fan Profile [Standard]
    Extension Fan 1 Q-Fan Control [Disabled]
    Extension Fan 2 Q-Fan Control [Disabled]
    Extension Fan 3 Q-Fan Control [Disabled]
    Fast Boot [Enabled]
    Next Boot after AC Power Loss [Normal Boot]
    Above 4G Decoding [Disabled]
    Boot Logo Display [Auto]
    POST Delay Time [3 sec]
    Boot up NumLock State [Enabled]
    Wait For 'F1' If Error [Enabled]
    Option ROM Messages [Enabled]
    Interrupt 19 Capture [Enabled]
    Setup Mode [Advanced Mode]
    Launch CSM [Disabled]
    OS Type [Windows UEFI mode]
    Setup Animator [Enabled]
    Load from Profile [1]
    Profile Name [5GHz]
    Save to Profile [1]
    Bus Interface [PCIEX16/X8_1]
    These can effect boot times(along with how many things you have connected to the board(i.e.. disks & peripheral's)
    Fast Boot [Enabled]
    POST Delay Time [3 sec]
    Wait For 'F1' If Error [Enabled]
    Option ROM Messages [Enabled]
    Interrupt 19 Capture [Enabled]

    Setup Animator [Enabled]
      My ComputersSystem Spec

  6.    08 Mar 2018 #6

    Hi Cliff,

    That's awesome! Thanks. The settings highlighted in bold, does enabled make boot faster or slower? Or is that you wanted these enabled?
      My ComputerSystem Spec

  7. AddRAM's Avatar
    Posts : 2,091
    Windows 7 Pro x64 Windows 10 Pro x64
       08 Mar 2018 #7

    Kol12 said: View Post
    How fast are your guy's boards starting up? Either into the Bios or Windows? My last Bios time was 25.7 seconds. Seems a bit slow and I find booting into the Bios a little on the slow side.. (X Hero)
    These boards today do a lot of tests to see if everything`s working before they ever get to Windows.
      My ComputersSystem Spec

  8. Cliff S's Avatar
    Posts : 21,250
    Win10 Pro, Win10 Pro N, Win10 Home, Win10 Pro Insider Fast Ring, Windows 8.1 Pro, Ubuntu
       08 Mar 2018 #8

    Kol12 said: View Post
    Hi Cliff,

    That's awesome! Thanks. The settings highlighted in bold, does enabled make boot faster or slower? Or is that you wanted these enabled?
    Those are just my settings, you might want to play around with them yourself.
    When making changes, I would recommend givving the change a couple of days, as from just one or two boots, you really cannot tell.

    The one that really affects the boot time, is POST Delay Time
    That is so you always have the option to get into BIOS at every boot.
    One of the things I wish ASUS had, that MSI has is a button in the taskbar the boots directly into BIOS


      My ComputersSystem Spec

  9. essenbe's Avatar
    Posts : 11,151
    Windows 10 Pro and Windows 10 Pro Insider
    Thread Starter
       08 Mar 2018 #9

    Cliff S said: View Post
    Those are just my settings, you might want to play around with them yourself.
    When making changes, I would recommend givving the change a couple of days, as from just one or two boots, you really cannot tell.

    The one that really affects the boot time, is POST Delay Time
    That is so you always have the option to get into BIOS at every boot.
    One of the things I wish ASUS had, that MSI has is a button in the taskbar the boots directly into BIOS


    If you have a button on the case, my X99 board has a bios connector. I have never used it, but I think it's there. If you don't have one you could save this to notepad and save it as BIOS.bat and it will reboot straight to bios, just run as Admin.
    Code:
    shutdown /r /fw /t 0
      My ComputersSystem Spec

  10.    08 Mar 2018 #10

    AddRAM said: View Post
    These boards today do a lot of tests to see if everything`s working before they ever get to Windows.
    That's not surprising.
      My ComputerSystem Spec


 
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