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[General Information] |
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Processor Name: |
Intel Core i7-7700HQ |
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Original Processor Frequency: |
2800.0 MHz |
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Original Processor Frequency [MHz]: |
2800 |
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CPU ID: |
000906E9 |
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CPU Brand Name: |
Intel(R) Core(TM) i7-7700HQ CPU @ 2.80GHz |
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CPU Vendor: |
GenuineIntel |
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CPU Stepping: |
B0 |
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CPU Code Name: |
Kaby Lake-H |
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CPU Technology: |
14 nm |
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CPU S-Spec: |
SR32Q |
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CPU Thermal Design Power (TDP): |
45.0 W |
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CPU Power Limits (Max): |
Power = Unlimited, Time = Unlimited |
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CPU Power Limit 1 - Long Duration: |
(45.00 W) (28.00 sec) [Unlocked] |
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CPU Power Limit 2 - Short Duration: |
(60.00 W) (2.44 ms) [Unlocked] |
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Configurable TDP Level 1 (Down): |
35.00 W (Unlimited range), 1700 MHz |
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Current Configurable TDP Level: |
Nominal [Unlocked] |
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CPU Max. Junction Temperature (Tj,max): |
100 °C |
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CPU Type: |
Production Unit |
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CPU Platform: |
BGA1440 |
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Microcode Update Revision: |
84 |
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Number of CPU Cores: |
4 |
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Number of Logical CPUs: |
8 |
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[Operating Points] |
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CPU MFM (LowPower): |
800.0 MHz = 8 x 100.0 MHz |
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CPU LFM (Minimum): |
800.0 MHz = 8 x 100.0 MHz |
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CPU HFM (Base): |
2800.0 MHz = 28 x 100.0 MHz |
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CPU Turbo Max: |
3800.0 MHz = 38 x 100.0 MHz [Unlocked] |
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Turbo Ratio Limits: |
38x (1c), 36x (2c), 35x (3c), 34x (4c) |
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CPU Current: |
3490.6 MHz = 35 x 99.7 MHz @ 1.1069 V |
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LLC/Ring Maximum: |
3500.0 MHz = 35.00 x 100.0 MHz |
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LLC/Ring Current: |
3191.4 MHz = 32.00 x 99.7 MHz @ 6.9220 V |
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System Agent Current: |
997.3 MHz = 10.00 x 99.7 MHz |
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CPU Bus Type: |
Intel Direct Media Interface (DMI) v3.0 |
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Maximum DMI Link Speed: |
8.0 GT/s |
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Current DMI Link Speed: |
8.0 GT/s |
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[IA Overclocking] |
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Voltage Offset: |
Supported |
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Voltage Override: |
Supported |
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Ratio Overclocking: |
Not Supported |
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Fused Ratio Limit: |
38x |
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Voltage Mode: |
Interpolative |
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Voltage Offset: |
0 mV |
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IccMax: |
Unlimited |
[GT Overclocking (Slice-EUs)] |
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Voltage Offset: |
Supported |
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Voltage Override: |
Supported |
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Ratio Overclocking: |
Supported |
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Fused Ratio Limit: |
60x |
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Voltage Mode: |
Interpolative |
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Voltage Offset: |
0 mV |
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IccMax: |
55.00 A |
[CLR (CBo/LLC/Ring) Overclocking] |
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Voltage Offset: |
Supported |
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Voltage Override: |
Supported |
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Ratio Overclocking: |
Not Supported |
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Fused Ratio Limit: |
35x |
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Voltage Mode: |
Interpolative |
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Voltage Offset: |
0 mV |
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IccMax: |
Unlimited |
[GT Overclocking (Unslice-Fixed Functions)] |
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Voltage Offset: |
Supported |
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Voltage Override: |
Supported |
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Ratio Overclocking: |
Supported |
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Fused Ratio Limit: |
60x |
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Voltage Mode: |
Interpolative |
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Voltage Offset: |
0 mV |
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IccMax: |
55.00 A |
[Uncore/SA Overclocking] |
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Voltage Offset: |
Supported |
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Voltage Override: |
Not Supported |
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Ratio Overclocking: |
Not Supported |
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Fused Ratio Limit: |
N/A |
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Voltage Mode: |
Interpolative |
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Voltage Offset: |
0 mV |
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IccMax: |
12.00 A |
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[Cache and TLB] |
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L1 Cache: |
Instruction: 4 x 32 KBytes, Data: 4 x 32 KBytes |
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L2 Cache: |
Integrated: 4 x 256 KBytes |
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L3 Cache: |
6 MBytes |
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Instruction TLB: |
2MB/4MB Pages, Fully associative, 8 entries |
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Data TLB: |
4 KB Pages, 4-way set associative, 64 entries |
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[Standard Feature Flags] |
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FPU on Chip |
Present |
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Enhanced Virtual-86 Mode |
Present |
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I/O Breakpoints |
Present |
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Page Size Extensions |
Present |
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Time Stamp Counter |
Present |
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Pentium-style Model Specific Registers |
Present |
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Physical Address Extension |
Present |
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Machine Check Exception |
Present |
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CMPXCHG8B Instruction |
Present |
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APIC On Chip / PGE (AMD) |
Present |
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Fast System Call |
Present |
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Memory Type Range Registers |
Present |
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Page Global Feature |
Present |
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Machine Check Architecture |
Present |
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CMOV Instruction |
Present |
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Page Attribute Table |
Present |
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36-bit Page Size Extensions |
Present |
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Processor Number |
Not Present |
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CLFLUSH Instruction |
Present |
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Debug Trace and EMON Store |
Present |
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Internal ACPI Support |
Present |
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MMX Technology |
Present |
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Fast FP Save/Restore (IA MMX-2) |
Present |
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Streaming SIMD Extensions |
Present |
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Streaming SIMD Extensions 2 |
Present |
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Self-Snoop |
Present |
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Multi-Threading Capable |
Present |
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Automatic Clock Control |
Present |
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IA-64 Processor |
Not Present |
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Signal Break on FERR |
Present |
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Virtual Machine Extensions (VMX) |
Present |
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Safer Mode Extensions (Intel TXT) |
Not Present |
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Streaming SIMD Extensions 3 |
Present |
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Supplemental Streaming SIMD Extensions 3 |
Present |
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Streaming SIMD Extensions 4.1 |
Present |
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Streaming SIMD Extensions 4.2 |
Present |
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AVX Support |
Present |
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Fused Multiply Add (FMA) |
Present |
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Carryless Multiplication (PCLMULQDQ)/GFMUL |
Present |
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CMPXCHG16B Support |
Present |
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MOVBE Instruction |
Present |
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POPCNT Instruction |
Present |
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XSAVE/XRSTOR/XSETBV/XGETBV Instructions |
Present |
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XGETBV/XSETBV OS Enabled |
Present |
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Float16 Instructions |
Present |
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AES Cryptography Support |
Present |
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Random Number Read Instruction (RDRAND) |
Present |
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Extended xAPIC |
Present |
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MONITOR/MWAIT Support |
Present |
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Thermal Monitor 2 |
Present |
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Enhanced SpeedStep Technology |
Present |
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L1 Context ID |
Not Present |
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Send Task Priority Messages Disabling |
Present |
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Processor Context ID |
Present |
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Direct Cache Access |
Not Present |
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TSC-deadline Timer |
Present |
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Performance/Debug Capability MSR |
Present |
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IA32 Debug Interface Support |
Present |
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64-Bit Debug Store |
Present |
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CPL Qualified Debug Store |
Present |
[Extended Feature Flags] |
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64-bit Extensions |
Present |
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RDTSCP and TSC_AUX Support |
Present |
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1 GB large page support |
Present |
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No Execute |
Present |
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SYSCALL/SYSRET Support |
Present |
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Bit Manipulation Instructions Set 1 |
Present |
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Bit Manipulation Instructions Set 2 |
Present |
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Advanced Vector Extensions 2 (AVX2) |
Present |
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Advanced Vector Extensions 512 (AVX-512) |
Not Present |
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AVX-512 Prefetch Instructions |
Not Present |
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AVX-512 Exponential and Reciprocal Instructions |
Not Present |
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AVX-512 Conflict Detection Instructions |
Not Present |
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AVX-512 Doubleword and Quadword Instructions |
Not Present |
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AVX-512 Byte and Word Instructions |
Not Present |
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AVX-512 Vector Length Extensions |
Not Present |
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AVX-512 52-bit Integer FMA Instructions |
Not Present |
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Secure Hash Algorithm (SHA) Extensions |
Not Present |
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Software Guard Extensions (SGX) Support |
Present |
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Supervisor Mode Execution Protection (SMEP) |
Present |
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Supervisor Mode Access Prevention (SMAP) |
Present |
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Hardware Lock Elision (HLE) |
Not Present |
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Restricted Transactional Memory (RTM) |
Not Present |
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Memory Protection Extensions (MPX) |
Present |
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Read/Write FS/GS Base Instructions |
Present |
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Enhanced Performance String Instruction |
Present |
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INVPCID Instruction |
Present |
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RDSEED Instruction |
Present |
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Multi-precision Add Carry Instructions (ADX) |
Present |
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PCOMMIT Instructions |
Not Present |
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CLFLUSHOPT Instructions |
Present |
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CLWB Instructions |
Not Present |
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TSC_THREAD_OFFSET |
Present |
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Platform Quality of Service Monitoring (PQM) |
Not Present |
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Platform Quality of Service Enforcement (PQE) |
Not Present |
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FPU Data Pointer updated only on x87 Exceptions |
Not Present |
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Deprecated FPU CS and FPU DS |
Present |
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Intel Processor Trace |
Present |
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PREFETCHWT1 Instruction |
Not Present |
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AVX-512 Vector Bit Manipulation Instructions |
Not Present |
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AVX-512 Vector Bit Manipulation Instructions 2 |
Not Present |
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AVX-512 Galois Fields New Instructions |
Not Present |
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AVX-512 Vector AES |
Not Present |
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AVX-512 Vector Neural Network Instructions |
Not Present |
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AVX-512 Bit Algorithms |
Not Present |
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AVX-512 Carry-Less Multiplication Quadword (VPCLMULQDQ) |
Not Present |
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AVX-512 Vector POPCNT (VPOPCNTD/VPOPCNTQ) |
Not Present |
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User-Mode Instruction Prevention |
Not Present |
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Protection Keys for User-mode Pages |
Not Present |
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OS Enabled Protection Keys |
Not Present |
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Wait and Pause Enhancements (WAITPKG) |
Not Present |
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Total Memory Encryption |
Not Present |
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Read Processor ID |
Not Present |
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Cache Line Demote |
Not Present |
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MOVDIRI: Direct Stores |
Not Present |
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MOVDIR64B: Direct Stores |
Not Present |
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SGX Launch Configuration |
Not Present |
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AVX-512 4 x Vector Neural Network Instructions Word Variable Precision |
Not Present |
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AVX-512 4 x Fused Multiply Accumulation Packed Single Precision |
Not Present |
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Fast Short REP MOV |
Not Present |
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Platform Configuration (PCONFIG) |
Not Present |
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[Enhanced Features] |
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Thermal Monitor 1: |
Supported, Enabled |
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Thermal Monitor 2: |
Supported, Enabled |
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Enhanced Intel SpeedStep (GV3): |
Supported, Enabled |
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Bi-directional PROCHOT#: |
Enabled |
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Extended Auto-HALT State C1E: |
Enabled |
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MLC Streamer Prefetcher |
Supported, Enabled |
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MLC Spatial Prefetcher |
Supported, Enabled |
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DCU Streamer Prefetcher |
Supported, Enabled |
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DCU IP Prefetcher |
Supported, Enabled |
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Intel Dynamic Acceleration (IDA) Technology: |
Not Supported |
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Intel Dynamic FSB Switching: |
Not Supported |
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Intel Turbo Boost Technology: |
Supported, Enabled |
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Programmable Ratio Limits: |
Supported, Disabled |
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Programmable TDC/TDP Limits: |
Supported, Disabled |
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Hardware Duty Cycling: |
Supported, Enabled |
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[CPU SKU Features] |
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Display HD Audio: |
Supported |
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DMI x4: |
Supported |
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DRAM ECC: |
Not Supported |
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DMI in Gen2 Mode: |
Supported |
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PEG in Gen2 Mode: |
Supported |
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1N Mode DDR Timings: |
Supported |
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Camarillo Device: |
Supported |
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2 DIMMs per Channel: |
Supported |
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X2APIC: |
Supported |
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Dual Memory Channel: |
Supported |
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Integrated GPU: |
Enabled |
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DDR Overclocking: |
Enabled |
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Overclocking by DSKU: |
Disabled |
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DDR3L: |
Supported |
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Maximum Memory Size per Channel: |
32 GB (unlimited) |
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DDR Frequency Support (100 MHz RefClk): |
1300 MHz |
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Overclocking: |
Disabled |
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SMT: |
Supported |
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Additive Graphics: |
Supported |
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Additive Graphics: |
Enabled |
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PCIe Gen 3: |
Supported |
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DMI Gen 3: |
Supported |
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HDCP: |
Supported |
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DDR4: |
Supported |
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LPDDR3: |
Supported |
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BCLK OC Limit: |
100 MHz |
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Maximum Supported LPDDR3 Frequency: |
1067 MHz |
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Maximum Supported DDR4 Frequency: |
1200 MHz |
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[Memory Ranges] |
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Maximum Physical Address Size: |
39-bit (512 GBytes) |
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Maximum Virtual Address Size: |
48-bit (256 TBytes) |
[MTRRs] |
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Range 80000000-100000000 (2048MB-4096MB) Type: |
Uncacheable (UC) |
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Range 7C000000-80000000 (1984MB-2048MB) Type: |
Uncacheable (UC) |
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Range 7B800000-7C000000 (1976MB-1984MB) Type: |
Uncacheable (UC) |